1. Field of the Invention
The present invention relates to an access control device and an access control method.
2. Description of the Related Art
As an external expansion bus of a personal computer (hereinafter, referred to a PC), or, as an internal bus in various electronic equipment, a PCI (Peripheral Component Interconnect) bus is known. The PCI bus can connect to a plurality of PCI devices. For example, as shown in FIG. 4, a PCI host control unit 1 and a plurality of PCI devices 2A-2C connect to a PCI bus 3.
On the other hand, as a standard of a bus used for a PC card, a CardBus is known. The CardBus is configured based on a PCI. However, signal specifications of the PCI bus and the CardBus are not perfectly identical. Therefore, a device 4 based upon the CardBus standard (hereinafter, referred to as a CardBus device) such as the PC card cannot be connected to the PCI bus directly. Accordingly, for example, as shown in FIG. 5, if the CardBus device 4 and the PCI host control unit 1 are connected, a PCI-CardBus bridge 5 has to be interposed therebetween. The PCI-CardBus bridge 5 is large-sized and costly. Only one CardBus device can be connected to one PCI-CardBus bridge 5.
Here, reason why CardBus cannot include a plurality of CardBus will be described below. The PCI host control unit 1 accesses the PCI devices 2A-2C via the PCI bus 3. When the PCI devices 2A-2C are recognized, the PCI host control unit 1 performs configuration processing. A PCI includes an address space of 4 G bytes. When the configuration processing is performed, an access region of each PCI devices 2A-2B is assigned to one of areas in the address space with 4 G bytes. For example, the access region of the PCI device 2A is assigned to 0x10000000-0x1000FFFF (0x: a hexadecimal number), and the access region of the PCI device 2B is assigned to 0x10010000-0x10010FFF, and the access region of the PCI device 2C is assigned to 0x20000000-0x20007FFF.
Information concerning the access region of each PCI devices 2A-2C is stored in a configuration register. In the configuration processing, the PCI host control unit 1 reads a value of the configuration register of each PCI devices 2A-2C. By performing the configuration processing, PCI devices 2A-2C can distinguish whether predetermined access is an access addressed to itself as an address on the PCI. Accordingly, even when a plurality of PCI devices 2A-2C are connected to a PCI bus 3, signals of the devices does not conflict.
After the configuration processing is completed, the individual address space is assigned to each PCI devices 2A-2C. On the other hand, each configuration register itself of each PCI devices 2A-2C is mapped in an identical address space. Therefore, accesses to PCI devices 2A-2C may conflict in the configuration processing. Thus a PCI includes an IDSEL signal which is effective only during the configuration processing. The IDSEL signal is a signal showing a configuration register of a device to be accessed. The IDSEL signal avoids an access conflict between the PCI devices 2A-2C during the configuration processing.
However, in the CardBus standard, the IDSEL signal mentioned above is not defined. Therefore, when a CardBus device 4 shown in FIG. 5 is connected to a PCI bus 3 shown in FIG. 4, an access conflict occurs between the CardBus device 4 and the PCI devices 2A-2C in the configuration processing.
Japanese Patent Application Laid-Open No. 2003-316725 discloses a configuration for using a device conforming to the PC card standard as a PCI device without using a bridge. In such configuration, a CPU and a bus change circuit controlled by the CPU are provided. When a PC card compliant device is accessed, a C/BE order bus is connected to the PC card compliant devices. On the other hand, when other device is accessed, the C/BE order bus is shut off from the PC card compliant device. However, in the aforementioned constitution, whenever the device is accessed, the CPU has to control the bus change circuit.